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<div class="header">
  <div class="summary">
<a href="#nested-classes">Data Structures</a> &#124;
<a href="#define-members">Macros</a> &#124;
<a href="#func-members">Functions</a>  </div>
  <div class="headertitle"><div class="title">MPU Functions for Armv8-M</div></div>
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<p>Functions that relate to the Memory Protection Unit.  
<a href="#details">More...</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="nested-classes" name="nested-classes"></a>
Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Setup information of a single MPU Region.  <a href="structARM__MPU__Region__t.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga81b2aa3fb55cdd5feadff02da10d391b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga81b2aa3fb55cdd5feadff02da10d391b">ARM_MPU_AP_</a>(RO,  NP)</td></tr>
<tr class="memdesc:ga81b2aa3fb55cdd5feadff02da10d391b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Memory access permissions.  <br /></td></tr>
<tr class="separator:ga81b2aa3fb55cdd5feadff02da10d391b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae62d5195b6ab6082a3f4a2584c101fab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a></td></tr>
<tr class="memdesc:gae62d5195b6ab6082a3f4a2584c101fab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, any privilege level.  <br /></td></tr>
<tr class="separator:gae62d5195b6ab6082a3f4a2584c101fab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga52386005c0529821308140cf86e6d1a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga52386005c0529821308140cf86e6d1a5">ARM_MPU_AP_PO</a></td></tr>
<tr class="memdesc:ga52386005c0529821308140cf86e6d1a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, privileged access only.  <br /></td></tr>
<tr class="separator:ga52386005c0529821308140cf86e6d1a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga64e249c7c678144b52493a4b6f8f6b3c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a></td></tr>
<tr class="memdesc:ga64e249c7c678144b52493a4b6f8f6b3c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, read-only.  <br /></td></tr>
<tr class="separator:ga64e249c7c678144b52493a4b6f8f6b3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga17ea49d510a4e30ff6026eed9302ae54"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga17ea49d510a4e30ff6026eed9302ae54">ARM_MPU_AP_RW</a></td></tr>
<tr class="memdesc:ga17ea49d510a4e30ff6026eed9302ae54"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, read/write.  <br /></td></tr>
<tr class="separator:ga17ea49d510a4e30ff6026eed9302ae54"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2c465cc9429b8233bcb9cd7cbef0e54c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga2c465cc9429b8233bcb9cd7cbef0e54c">ARM_MPU_ATTR</a>(O,  I)</td></tr>
<tr class="memdesc:ga2c465cc9429b8233bcb9cd7cbef0e54c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Memory Attribute.  <br /></td></tr>
<tr class="separator:ga2c465cc9429b8233bcb9cd7cbef0e54c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab4bfac6284dc050dc6fa6aeb8e954c2c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gab4bfac6284dc050dc6fa6aeb8e954c2c">ARM_MPU_ATTR_DEVICE</a>&#160;&#160;&#160;( 0U )</td></tr>
<tr class="memdesc:gab4bfac6284dc050dc6fa6aeb8e954c2c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Attribute for device memory (outer only)  <br /></td></tr>
<tr class="separator:gab4bfac6284dc050dc6fa6aeb8e954c2c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga496bcd6a2bbd038d8935049fec9d0fda"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga496bcd6a2bbd038d8935049fec9d0fda">ARM_MPU_ATTR_DEVICE_GRE</a></td></tr>
<tr class="memdesc:ga496bcd6a2bbd038d8935049fec9d0fda"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device memory type Gathering, Re-ordering, Early Write Acknowledgement.  <br /></td></tr>
<tr class="separator:ga496bcd6a2bbd038d8935049fec9d0fda"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6e08ae44fab85e03fea96ae6a5fcdfb0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga6e08ae44fab85e03fea96ae6a5fcdfb0">ARM_MPU_ATTR_DEVICE_nGnRE</a></td></tr>
<tr class="memdesc:ga6e08ae44fab85e03fea96ae6a5fcdfb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement.  <br /></td></tr>
<tr class="separator:ga6e08ae44fab85e03fea96ae6a5fcdfb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabfa9ae279357044cf5b74e77af22a686"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gabfa9ae279357044cf5b74e77af22a686">ARM_MPU_ATTR_DEVICE_nGnRnE</a></td></tr>
<tr class="memdesc:gabfa9ae279357044cf5b74e77af22a686"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement.  <br /></td></tr>
<tr class="separator:gabfa9ae279357044cf5b74e77af22a686"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadcc9977aabb4dc7177d30cbbac1b53d1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gadcc9977aabb4dc7177d30cbbac1b53d1">ARM_MPU_ATTR_DEVICE_nGRE</a></td></tr>
<tr class="memdesc:gadcc9977aabb4dc7177d30cbbac1b53d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device memory type non Gathering, Re-ordering, Early Write Acknowledgement.  <br /></td></tr>
<tr class="separator:gadcc9977aabb4dc7177d30cbbac1b53d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac2f1c567950e3785d75773362b525390"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac2f1c567950e3785d75773362b525390">ARM_MPU_ATTR_MEMORY_</a>(NT,  WB,  RA,  WA)</td></tr>
<tr class="memdesc:gac2f1c567950e3785d75773362b525390"><td class="mdescLeft">&#160;</td><td class="mdescRight">Attribute for Normal memory, Outer and Inner cacheability.  <br /></td></tr>
<tr class="separator:gac2f1c567950e3785d75773362b525390"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga03266f9660485693eb1baec6ba255ab2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga03266f9660485693eb1baec6ba255ab2">ARM_MPU_ATTR_NON_CACHEABLE</a>&#160;&#160;&#160;( 4U )</td></tr>
<tr class="memdesc:ga03266f9660485693eb1baec6ba255ab2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Attribute for non-cacheable, normal memory.  <br /></td></tr>
<tr class="separator:ga03266f9660485693eb1baec6ba255ab2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga613533046759fd317008e9937cda62de"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga613533046759fd317008e9937cda62de">ARM_MPU_EX</a></td></tr>
<tr class="memdesc:ga613533046759fd317008e9937cda62de"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, Execution only permitted if read permitted.  <br /></td></tr>
<tr class="separator:ga613533046759fd317008e9937cda62de"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafe39c2f98058bcac7e7e0501e64e7a9d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gafe39c2f98058bcac7e7e0501e64e7a9d">ARM_MPU_RBAR</a>(BASE,  SH,  RO,  NP,  XN)</td></tr>
<tr class="memdesc:gafe39c2f98058bcac7e7e0501e64e7a9d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Region Base Address Register value.  <br /></td></tr>
<tr class="separator:gafe39c2f98058bcac7e7e0501e64e7a9d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeaaa071276ba7956944e6c3dc05d677e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(LIMIT,  IDX)</td></tr>
<tr class="memdesc:gaeaaa071276ba7956944e6c3dc05d677e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Region Limit Address Register value.  <br /></td></tr>
<tr class="separator:gaeaaa071276ba7956944e6c3dc05d677e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5bff4d6cfaa678776b3b1eab4af70f95"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga5bff4d6cfaa678776b3b1eab4af70f95">ARM_MPU_RLAR_PXN</a>(LIMIT,  PXN,  IDX)</td></tr>
<tr class="memdesc:ga5bff4d6cfaa678776b3b1eab4af70f95"><td class="mdescLeft">&#160;</td><td class="mdescRight">Region Limit Address Register with PXN value.  <br /></td></tr>
<tr class="separator:ga5bff4d6cfaa678776b3b1eab4af70f95"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga73c70127f24f34781ad463cbe51d8f6b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga73c70127f24f34781ad463cbe51d8f6b">ARM_MPU_SH_INNER</a></td></tr>
<tr class="memdesc:ga73c70127f24f34781ad463cbe51d8f6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory inner shareable <br  />
  <br /></td></tr>
<tr class="separator:ga73c70127f24f34781ad463cbe51d8f6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3d0f688198289f72264f73cf72a742e8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a></td></tr>
<tr class="memdesc:ga3d0f688198289f72264f73cf72a742e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory non-shareable <br  />
  <br /></td></tr>
<tr class="separator:ga3d0f688198289f72264f73cf72a742e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac4fddbdb9e1350bce6906de33c1fd500"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac4fddbdb9e1350bce6906de33c1fd500">ARM_MPU_SH_OUTER</a></td></tr>
<tr class="memdesc:gac4fddbdb9e1350bce6906de33c1fd500"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory outer shareable <br  />
  <br /></td></tr>
<tr class="separator:gac4fddbdb9e1350bce6906de33c1fd500"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8127782b882cbb8419519fc6c98a0b6b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a></td></tr>
<tr class="memdesc:ga8127782b882cbb8419519fc6c98a0b6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, Execution only permitted if read permitted.  <br /></td></tr>
<tr class="separator:ga8127782b882cbb8419519fc6c98a0b6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga386cab980b576bc5f61388b659eea9a8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga386cab980b576bc5f61388b659eea9a8">MPU_ATTR_NORMAL_INNER_NON_CACHEABLE</a></td></tr>
<tr class="separator:ga386cab980b576bc5f61388b659eea9a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga17b7f3281e42f8507336f709520e9785"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga17b7f3281e42f8507336f709520e9785">MPU_ATTR_NORMAL_INNER_WB_RA</a></td></tr>
<tr class="separator:ga17b7f3281e42f8507336f709520e9785"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga61c99cef4678523dd070d863a7385cec"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga61c99cef4678523dd070d863a7385cec">MPU_ATTR_NORMAL_INNER_WB_RA_WA</a></td></tr>
<tr class="separator:ga61c99cef4678523dd070d863a7385cec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9ae76961b518f86ba1d390913f4ee45e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga9ae76961b518f86ba1d390913f4ee45e">MPU_ATTR_NORMAL_INNER_WB_TR_RA</a></td></tr>
<tr class="separator:ga9ae76961b518f86ba1d390913f4ee45e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf63176f20e4a30bd283463c98c363cf2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaf63176f20e4a30bd283463c98c363cf2">MPU_ATTR_NORMAL_INNER_WB_TR_RA_WA</a></td></tr>
<tr class="separator:gaf63176f20e4a30bd283463c98c363cf2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2e30e4ab7f3aee0a16399f6de178e532"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga2e30e4ab7f3aee0a16399f6de178e532">MPU_ATTR_NORMAL_INNER_WB_TR_WA</a></td></tr>
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<tr class="memitem:gacb7962caa69fd238b5d8bbfb60a7a959"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gacb7962caa69fd238b5d8bbfb60a7a959">MPU_ATTR_NORMAL_INNER_WB_WA</a></td></tr>
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<tr class="memitem:gaa865e157ac3fc278d39c5c688165252b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaa865e157ac3fc278d39c5c688165252b">MPU_ATTR_NORMAL_INNER_WT_RA</a></td></tr>
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<tr class="memitem:gae871e61119bdab6409a01fd45aa28811"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gae871e61119bdab6409a01fd45aa28811">MPU_ATTR_NORMAL_INNER_WT_RA_WA</a></td></tr>
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<tr class="memitem:ga8669f856b6f0132b6c4022916ca1ad94"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga8669f856b6f0132b6c4022916ca1ad94">MPU_ATTR_NORMAL_INNER_WT_TR_RA</a></td></tr>
<tr class="separator:ga8669f856b6f0132b6c4022916ca1ad94"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac1c0b1a3b22d0c0ea875355039eae4c0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac1c0b1a3b22d0c0ea875355039eae4c0">MPU_ATTR_NORMAL_INNER_WT_TR_RA_WA</a></td></tr>
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<tr class="memitem:gac41f314de36519d6ebde13a1e997c65f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac41f314de36519d6ebde13a1e997c65f">MPU_ATTR_NORMAL_INNER_WT_TR_WA</a></td></tr>
<tr class="separator:gac41f314de36519d6ebde13a1e997c65f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4550de69e30075efc70213a79b929e92"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga4550de69e30075efc70213a79b929e92">MPU_ATTR_NORMAL_INNER_WT_WA</a></td></tr>
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<tr class="memitem:gab0847e1992e71f74ed5a31316d22b7bd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gab0847e1992e71f74ed5a31316d22b7bd">MPU_ATTR_NORMAL_OUTER_NON_CACHEABLE</a></td></tr>
<tr class="memdesc:gab0847e1992e71f74ed5a31316d22b7bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory outer-cacheable and inner-cacheable attributes WT = Write Through, WB = Write Back, TR = Transient, RA = Read-Allocate, WA = Write Allocate.  <br /></td></tr>
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<tr class="memitem:gad5312c58ebef6849b86765e276bf614a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gad5312c58ebef6849b86765e276bf614a">MPU_ATTR_NORMAL_OUTER_WB_RA</a></td></tr>
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<tr class="memitem:ga72a1da6f37f307e4e7b122bec86bc63a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga72a1da6f37f307e4e7b122bec86bc63a">MPU_ATTR_NORMAL_OUTER_WB_RA_WA</a></td></tr>
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<tr class="memitem:ga0012b8fe0edfcac50ee368c44ae98123"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga0012b8fe0edfcac50ee368c44ae98123">MPU_ATTR_NORMAL_OUTER_WB_TR_RA</a></td></tr>
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<tr class="memitem:gac6951446163b7acc7ec945d81e35de5d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac6951446163b7acc7ec945d81e35de5d">MPU_ATTR_NORMAL_OUTER_WB_TR_RA_WA</a></td></tr>
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<tr class="memitem:ga934e2485b0df7a213a99896018786278"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga934e2485b0df7a213a99896018786278">MPU_ATTR_NORMAL_OUTER_WB_TR_WA</a></td></tr>
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<tr class="memitem:ga9e83c355036cda1e65cc64f0dc6ca2a8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga9e83c355036cda1e65cc64f0dc6ca2a8">MPU_ATTR_NORMAL_OUTER_WB_WA</a></td></tr>
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<tr class="memitem:gae321b8422975d41ac1c488ad4ea149c0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gae321b8422975d41ac1c488ad4ea149c0">MPU_ATTR_NORMAL_OUTER_WT_RA</a></td></tr>
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<tr class="memitem:gaa7643b0faffce08a7e5598d720e1bfa5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaa7643b0faffce08a7e5598d720e1bfa5">MPU_ATTR_NORMAL_OUTER_WT_RA_WA</a></td></tr>
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<tr class="memitem:ga55c4d3e20300bbbb02b8567ed8f2b4e1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga55c4d3e20300bbbb02b8567ed8f2b4e1">MPU_ATTR_NORMAL_OUTER_WT_TR_RA</a></td></tr>
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<tr class="memitem:ga9425e85dc19e840dd303094f79ed38e3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga9425e85dc19e840dd303094f79ed38e3">MPU_ATTR_NORMAL_OUTER_WT_TR_RA_WA</a></td></tr>
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<tr class="memitem:ga129149491f30c513784a3ffd28b59a48"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga129149491f30c513784a3ffd28b59a48">MPU_ATTR_NORMAL_OUTER_WT_TR_WA</a></td></tr>
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<tr class="memitem:ga9d1be17c0bd5895736d4ab352434f61e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga9d1be17c0bd5895736d4ab352434f61e">MPU_ATTR_NORMAL_OUTER_WT_WA</a></td></tr>
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</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga9dcb0afddf4ac351f33f3c7a5169c62c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga9dcb0afddf4ac351f33f3c7a5169c62c">ARM_MPU_ClrRegion</a> (uint32_t rnr)</td></tr>
<tr class="separator:ga9dcb0afddf4ac351f33f3c7a5169c62c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac526bc5bfcf048ce57a44c0c0cdadbe4"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac526bc5bfcf048ce57a44c0c0cdadbe4">ARM_MPU_ClrRegion_NS</a> (uint32_t rnr)</td></tr>
<tr class="separator:gac526bc5bfcf048ce57a44c0c0cdadbe4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga01fa1151c9ec0ba5de76f908c0999316"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga01fa1151c9ec0ba5de76f908c0999316">ARM_MPU_ClrRegionEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint32_t rnr)</td></tr>
<tr class="separator:ga01fa1151c9ec0ba5de76f908c0999316"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga61814eba4652a0fdfb76bbe222086327"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga61814eba4652a0fdfb76bbe222086327">ARM_MPU_Disable</a> (void)</td></tr>
<tr class="separator:ga61814eba4652a0fdfb76bbe222086327"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga389f9b6049d176bc83f9964d3259b712"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga389f9b6049d176bc83f9964d3259b712">ARM_MPU_Disable_NS</a> (void)</td></tr>
<tr class="separator:ga389f9b6049d176bc83f9964d3259b712"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5a3f40314553baccdeea551f86d9a997"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga5a3f40314553baccdeea551f86d9a997">ARM_MPU_Enable</a> (uint32_t MPU_Control)</td></tr>
<tr class="memdesc:ga5a3f40314553baccdeea551f86d9a997"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the MPU.  <br /></td></tr>
<tr class="separator:ga5a3f40314553baccdeea551f86d9a997"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5866c75d6deb9148a1e9af6337eec50a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga5866c75d6deb9148a1e9af6337eec50a">ARM_MPU_Enable_NS</a> (uint32_t MPU_Control)</td></tr>
<tr class="separator:ga5866c75d6deb9148a1e9af6337eec50a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaca76614e3091c7324aa9d60e634621bf"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaca76614e3091c7324aa9d60e634621bf">ARM_MPU_Load</a> (uint32_t rnr, <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *table, uint32_t cnt)</td></tr>
<tr class="separator:gaca76614e3091c7324aa9d60e634621bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7f8c6e09be98067d613e4df1832c543d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga7f8c6e09be98067d613e4df1832c543d">ARM_MPU_Load_NS</a> (uint32_t rnr, <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *table, uint32_t cnt)</td></tr>
<tr class="separator:ga7f8c6e09be98067d613e4df1832c543d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab6094419f2abd678f1f3b121cd115049"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gab6094419f2abd678f1f3b121cd115049">ARM_MPU_LoadEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint32_t rnr, <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *table, uint32_t cnt)</td></tr>
<tr class="separator:gab6094419f2abd678f1f3b121cd115049"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac1a949403bf84eecaf407003fb553ae7"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac1a949403bf84eecaf407003fb553ae7">ARM_MPU_OrderedMemcpy</a> (volatile uint32_t *dst, const uint32_t *<a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a> src, uint32_t len)</td></tr>
<tr class="separator:gac1a949403bf84eecaf407003fb553ae7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab5b3c0a53d19c09a5550f1d9071ae65c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gab5b3c0a53d19c09a5550f1d9071ae65c">ARM_MPU_SetMemAttr</a> (uint8_t idx, uint8_t attr)</td></tr>
<tr class="separator:gab5b3c0a53d19c09a5550f1d9071ae65c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5100a150a755902af2455a455a329ef9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga5100a150a755902af2455a455a329ef9">ARM_MPU_SetMemAttr_NS</a> (uint8_t idx, uint8_t attr)</td></tr>
<tr class="separator:ga5100a150a755902af2455a455a329ef9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1799413f08a157d636a1491371c15ce2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga1799413f08a157d636a1491371c15ce2">ARM_MPU_SetMemAttrEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint8_t idx, uint8_t attr)</td></tr>
<tr class="separator:ga1799413f08a157d636a1491371c15ce2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6d7f220015c070c0e469948c1775ee3d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga6d7f220015c070c0e469948c1775ee3d">ARM_MPU_SetRegion</a> (uint32_t rnr, uint32_t rbar, uint32_t rlar)</td></tr>
<tr class="separator:ga6d7f220015c070c0e469948c1775ee3d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7566931ca9bb9f22d213a67ec5f8c745"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga7566931ca9bb9f22d213a67ec5f8c745">ARM_MPU_SetRegion_NS</a> (uint32_t rnr, uint32_t rbar, uint32_t rlar)</td></tr>
<tr class="separator:ga7566931ca9bb9f22d213a67ec5f8c745"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3d50ba8546252bea959e45c8fdf16993"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga3d50ba8546252bea959e45c8fdf16993">ARM_MPU_SetRegionEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)</td></tr>
<tr class="separator:ga3d50ba8546252bea959e45c8fdf16993"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabd11943b38cdf185dcb8e60e459d5854"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gabd11943b38cdf185dcb8e60e459d5854">ARM_MPU_TYPE</a> ()</td></tr>
<tr class="memdesc:gabd11943b38cdf185dcb8e60e459d5854"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read MPU Type Register.  <br /></td></tr>
<tr class="separator:gabd11943b38cdf185dcb8e60e459d5854"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
<p>Functions that relate to the Memory Protection Unit. </p>
<p>The following functions support the optional Memory Protection Unit (MPU) that is available on the Cortex-M23, M33, M35P processor.</p>
<p>The MPU is used to prevent from illegal memory accesses that are typically caused by errors in an application software.</p>
<p><b>Example:</b> </p><div class="fragment"><div class="line"><span class="keywordtype">int</span> main() </div>
<div class="line">{</div>
<div class="line">  <span class="comment">// Set Region 0 using Attr 0</span></div>
<div class="line">  <a class="code hl_function" href="group__mpu8__functions.html#gab5b3c0a53d19c09a5550f1d9071ae65c">ARM_MPU_SetMemAttr</a>(0UL, <a class="code hl_define" href="group__mpu8__functions.html#ga2c465cc9429b8233bcb9cd7cbef0e54c">ARM_MPU_ATTR</a>( <span class="comment">/* Normal memory */</span></div>
<div class="line">    <a class="code hl_define" href="group__mpu8__functions.html#ga9425e85dc19e840dd303094f79ed38e3">MPU_ATTR_NORMAL_OUTER_WT_TR_RA_WA</a>,  <span class="comment">/* Outer Write-Back transient with read and write allocate */</span></div>
<div class="line">    <a class="code hl_define" href="group__mpu8__functions.html#gac1c0b1a3b22d0c0ea875355039eae4c0">MPU_ATTR_NORMAL_INNER_WT_TR_RA_WA</a>   <span class="comment">/* Inner Write-Through transient with read and write allocate */</span></div>
<div class="line">  ));</div>
<div class="line">  </div>
<div class="line">  <a class="code hl_function" href="group__mpu__functions.html#ga16931f9ad84d7289e8218e169ae6db5d">ARM_MPU_SetRegion</a>(0UL,</div>
<div class="line">    <a class="code hl_define" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x08000000UL, <a class="code hl_define" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga17ea49d510a4e30ff6026eed9302ae54">ARM_MPU_AP_RW</a>, <a class="code hl_define" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a>),  <span class="comment">/* Non-shareable, read/write, non-privileged, execute-never */</span></div>
<div class="line">    <a class="code hl_define" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x080FFFFFUL, MAIR_ATTR(0))                        <span class="comment">/* 1MB memory block using Attr 0 */</span></div>
<div class="line">  );</div>
<div class="line">  </div>
<div class="line">  <a class="code hl_function" href="group__mpu__functions.html#ga31406efd492ec9a091a70ffa2d8a42fb">ARM_MPU_Enable</a>(0);</div>
<div class="line">  </div>
<div class="line">  <span class="comment">// Execute application code that is access protected by the MPU</span></div>
<div class="line">  </div>
<div class="line">  <a class="code hl_function" href="group__mpu__functions.html#ga7cbc0a4a066ed90e85c8176228235d57">ARM_MPU_Disable</a>();</div>
<div class="line">}</div>
<div class="ttc" id="agroup__mpu8__functions_html_ga17ea49d510a4e30ff6026eed9302ae54"><div class="ttname"><a href="group__mpu8__functions.html#ga17ea49d510a4e30ff6026eed9302ae54">ARM_MPU_AP_RW</a></div><div class="ttdeci">#define ARM_MPU_AP_RW</div><div class="ttdoc">Normal memory, read/write.</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:114</div></div>
<div class="ttc" id="agroup__mpu8__functions_html_ga2c465cc9429b8233bcb9cd7cbef0e54c"><div class="ttname"><a href="group__mpu8__functions.html#ga2c465cc9429b8233bcb9cd7cbef0e54c">ARM_MPU_ATTR</a></div><div class="ttdeci">#define ARM_MPU_ATTR(O, I)</div><div class="ttdoc">Memory Attribute.</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:95</div></div>
<div class="ttc" id="agroup__mpu8__functions_html_ga3d0f688198289f72264f73cf72a742e8"><div class="ttname"><a href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a></div><div class="ttdeci">#define ARM_MPU_SH_NON</div><div class="ttdoc">Normal memory non-shareable</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:101</div></div>
<div class="ttc" id="agroup__mpu8__functions_html_ga8127782b882cbb8419519fc6c98a0b6b"><div class="ttname"><a href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a></div><div class="ttdeci">#define ARM_MPU_XN</div><div class="ttdoc">Normal memory, Execution only permitted if read permitted.</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:130</div></div>
<div class="ttc" id="agroup__mpu8__functions_html_ga9425e85dc19e840dd303094f79ed38e3"><div class="ttname"><a href="group__mpu8__functions.html#ga9425e85dc19e840dd303094f79ed38e3">MPU_ATTR_NORMAL_OUTER_WT_TR_RA_WA</a></div><div class="ttdeci">#define MPU_ATTR_NORMAL_OUTER_WT_TR_RA_WA</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:67</div></div>
<div class="ttc" id="agroup__mpu8__functions_html_gab5b3c0a53d19c09a5550f1d9071ae65c"><div class="ttname"><a href="group__mpu8__functions.html#gab5b3c0a53d19c09a5550f1d9071ae65c">ARM_MPU_SetMemAttr</a></div><div class="ttdeci">__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)</div></div>
<div class="ttc" id="agroup__mpu8__functions_html_gac1c0b1a3b22d0c0ea875355039eae4c0"><div class="ttname"><a href="group__mpu8__functions.html#gac1c0b1a3b22d0c0ea875355039eae4c0">MPU_ATTR_NORMAL_INNER_WT_TR_RA_WA</a></div><div class="ttdeci">#define MPU_ATTR_NORMAL_INNER_WT_TR_RA_WA</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:80</div></div>
<div class="ttc" id="agroup__mpu8__functions_html_gae62d5195b6ab6082a3f4a2584c101fab"><div class="ttname"><a href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a></div><div class="ttdeci">#define ARM_MPU_AP_NP</div><div class="ttdoc">Normal memory, any privilege level.</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:120</div></div>
<div class="ttc" id="agroup__mpu8__functions_html_gaeaaa071276ba7956944e6c3dc05d677e"><div class="ttname"><a href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a></div><div class="ttdeci">#define ARM_MPU_RLAR(LIMIT, IDX)</div><div class="ttdoc">Region Limit Address Register value.</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:154</div></div>
<div class="ttc" id="agroup__mpu__functions_html_ga16931f9ad84d7289e8218e169ae6db5d"><div class="ttname"><a href="group__mpu__functions.html#ga16931f9ad84d7289e8218e169ae6db5d">ARM_MPU_SetRegion</a></div><div class="ttdeci">__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)</div></div>
<div class="ttc" id="agroup__mpu__functions_html_ga31406efd492ec9a091a70ffa2d8a42fb"><div class="ttname"><a href="group__mpu__functions.html#ga31406efd492ec9a091a70ffa2d8a42fb">ARM_MPU_Enable</a></div><div class="ttdeci">__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_CTRL)</div><div class="ttdoc">Enable the memory protection unit (MPU) and.</div></div>
<div class="ttc" id="agroup__mpu__functions_html_ga3fead12dc24a6d00ad53f55a042486ca"><div class="ttname"><a href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a></div><div class="ttdeci">#define ARM_MPU_RBAR(Region, BaseAddress)</div><div class="ttdoc">MPU Region Base Address Register Value.</div><div class="ttdef"><b>Definition:</b> ref_mpu.txt:41</div></div>
<div class="ttc" id="agroup__mpu__functions_html_ga7cbc0a4a066ed90e85c8176228235d57"><div class="ttname"><a href="group__mpu__functions.html#ga7cbc0a4a066ed90e85c8176228235d57">ARM_MPU_Disable</a></div><div class="ttdeci">__STATIC_INLINE void ARM_MPU_Disable()</div></div>
</div><!-- fragment --> <h2 class="groupheader">Macro Definition Documentation</h2>
<a id="ga81b2aa3fb55cdd5feadff02da10d391b" name="ga81b2aa3fb55cdd5feadff02da10d391b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga81b2aa3fb55cdd5feadff02da10d391b">&#9670;&#160;</a></span>ARM_MPU_AP_</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARM_MPU_AP_</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RO, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">NP&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Memory access permissions. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">RO</td><td>Read-Only: Set to 1 for read-only memory. </td></tr>
    <tr><td class="paramname">NP</td><td>Non-Privileged: Set to 1 for non-privileged memory. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gae62d5195b6ab6082a3f4a2584c101fab" name="gae62d5195b6ab6082a3f4a2584c101fab"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae62d5195b6ab6082a3f4a2584c101fab">&#9670;&#160;</a></span>ARM_MPU_AP_NP</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARM_MPU_AP_NP</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Normal memory, any privilege level. </p>

</div>
</div>
<a id="ga52386005c0529821308140cf86e6d1a5" name="ga52386005c0529821308140cf86e6d1a5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga52386005c0529821308140cf86e6d1a5">&#9670;&#160;</a></span>ARM_MPU_AP_PO</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARM_MPU_AP_PO</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Normal memory, privileged access only. </p>

</div>
</div>
<a id="ga64e249c7c678144b52493a4b6f8f6b3c" name="ga64e249c7c678144b52493a4b6f8f6b3c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga64e249c7c678144b52493a4b6f8f6b3c">&#9670;&#160;</a></span>ARM_MPU_AP_RO</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARM_MPU_AP_RO</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Normal memory, read-only. </p>

</div>
</div>
<a id="ga17ea49d510a4e30ff6026eed9302ae54" name="ga17ea49d510a4e30ff6026eed9302ae54"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga17ea49d510a4e30ff6026eed9302ae54">&#9670;&#160;</a></span>ARM_MPU_AP_RW</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARM_MPU_AP_RW</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Normal memory, read/write. </p>
<p>Access permissions AP = Access permission, RO = Read-only, RW = Read/Write, NP = Any privilege, PO = Privileged code only </p>

</div>
</div>
<a id="ga2c465cc9429b8233bcb9cd7cbef0e54c" name="ga2c465cc9429b8233bcb9cd7cbef0e54c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga2c465cc9429b8233bcb9cd7cbef0e54c">&#9670;&#160;</a></span>ARM_MPU_ATTR</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARM_MPU_ATTR</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">O, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">I&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Memory Attribute. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">O</td><td>Outer memory attributes </td></tr>
    <tr><td class="paramname">I</td><td>O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gab4bfac6284dc050dc6fa6aeb8e954c2c" name="gab4bfac6284dc050dc6fa6aeb8e954c2c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab4bfac6284dc050dc6fa6aeb8e954c2c">&#9670;&#160;</a></span>ARM_MPU_ATTR_DEVICE</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARM_MPU_ATTR_DEVICE&#160;&#160;&#160;( 0U )</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Attribute for device memory (outer only) </p>

</div>
</div>
<a id="ga496bcd6a2bbd038d8935049fec9d0fda" name="ga496bcd6a2bbd038d8935049fec9d0fda"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga496bcd6a2bbd038d8935049fec9d0fda">&#9670;&#160;</a></span>ARM_MPU_ATTR_DEVICE_GRE</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARM_MPU_ATTR_DEVICE_GRE</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Device memory type Gathering, Re-ordering, Early Write Acknowledgement. </p>

</div>
</div>
<a id="ga6e08ae44fab85e03fea96ae6a5fcdfb0" name="ga6e08ae44fab85e03fea96ae6a5fcdfb0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6e08ae44fab85e03fea96ae6a5fcdfb0">&#9670;&#160;</a></span>ARM_MPU_ATTR_DEVICE_nGnRE</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARM_MPU_ATTR_DEVICE_nGnRE</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement. </p>

</div>
</div>
<a id="gabfa9ae279357044cf5b74e77af22a686" name="gabfa9ae279357044cf5b74e77af22a686"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabfa9ae279357044cf5b74e77af22a686">&#9670;&#160;</a></span>ARM_MPU_ATTR_DEVICE_nGnRnE</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARM_MPU_ATTR_DEVICE_nGnRnE</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement. </p>

</div>
</div>
<a id="gadcc9977aabb4dc7177d30cbbac1b53d1" name="gadcc9977aabb4dc7177d30cbbac1b53d1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gadcc9977aabb4dc7177d30cbbac1b53d1">&#9670;&#160;</a></span>ARM_MPU_ATTR_DEVICE_nGRE</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARM_MPU_ATTR_DEVICE_nGRE</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Device memory type non Gathering, Re-ordering, Early Write Acknowledgement. </p>

</div>
</div>
<a id="gac2f1c567950e3785d75773362b525390" name="gac2f1c567950e3785d75773362b525390"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac2f1c567950e3785d75773362b525390">&#9670;&#160;</a></span>ARM_MPU_ATTR_MEMORY_</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARM_MPU_ATTR_MEMORY_</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">NT, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">WB, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RA, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">WA&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Attribute for Normal memory, Outer and Inner cacheability. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">NT</td><td>Non-Transient: Set to 1 for Non-transient data. Set to 0 for Transient data. </td></tr>
    <tr><td class="paramname">WB</td><td>Write-Back: Set to 1 to use a Write-Back policy. Set to 0 to use a Write-Through policy. </td></tr>
    <tr><td class="paramname">RA</td><td>Read Allocation: Set to 1 to enable cache allocation on read miss. Set to 0 to disable cache allocation on read miss. </td></tr>
    <tr><td class="paramname">WA</td><td>Write Allocation: Set to 1 to enable cache allocation on write miss. Set to 0 to disable cache allocation on write miss. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga03266f9660485693eb1baec6ba255ab2" name="ga03266f9660485693eb1baec6ba255ab2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga03266f9660485693eb1baec6ba255ab2">&#9670;&#160;</a></span>ARM_MPU_ATTR_NON_CACHEABLE</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARM_MPU_ATTR_NON_CACHEABLE&#160;&#160;&#160;( 4U )</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Attribute for non-cacheable, normal memory. </p>

</div>
</div>
<a id="ga613533046759fd317008e9937cda62de" name="ga613533046759fd317008e9937cda62de"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga613533046759fd317008e9937cda62de">&#9670;&#160;</a></span>ARM_MPU_EX</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARM_MPU_EX</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Normal memory, Execution only permitted if read permitted. </p>

</div>
</div>
<a id="gafe39c2f98058bcac7e7e0501e64e7a9d" name="gafe39c2f98058bcac7e7e0501e64e7a9d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gafe39c2f98058bcac7e7e0501e64e7a9d">&#9670;&#160;</a></span>ARM_MPU_RBAR</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARM_MPU_RBAR</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BASE, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">SH, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RO, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">NP, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">XN&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Region Base Address Register value. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BASE</td><td>The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned. </td></tr>
    <tr><td class="paramname">SH</td><td>Defines the Shareability domain for this memory region. </td></tr>
    <tr><td class="paramname">RO</td><td>Read-Only: Set to 1 for a read-only memory region. Set to 0 for a read/write memory region. </td></tr>
    <tr><td class="paramname">NP</td><td>Non-Privileged: Set to 1 for a non-privileged memory region. Set to 0 for privileged memory region. </td></tr>
    <tr><td class="paramname">XN</td><td>eXecute Never: Set to 1 for a non-executable memory region. Set to 0 for an executable memory region. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#gaeaaa071276ba7956944e6c3dc05d677e">&#9670;&#160;</a></span>ARM_MPU_RLAR</h2>

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          <td class="memname">#define ARM_MPU_RLAR</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">LIMIT, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">IDX&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Region Limit Address Register value. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">LIMIT</td><td>The limit address bits [31:5] for this memory region. The value is one extended. </td></tr>
    <tr><td class="paramname">IDX</td><td>The attribute index to be associated with this memory region. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ga5bff4d6cfaa678776b3b1eab4af70f95">&#9670;&#160;</a></span>ARM_MPU_RLAR_PXN</h2>

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      <table class="memname">
        <tr>
          <td class="memname">#define ARM_MPU_RLAR_PXN</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">LIMIT, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">PXN, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">IDX&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Region Limit Address Register with PXN value. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">LIMIT</td><td>The limit address bits [31:5] for this memory region. The value is one extended. </td></tr>
    <tr><td class="paramname">PXN</td><td>Privileged execute never. Defines whether code can be executed from this privileged region. </td></tr>
    <tr><td class="paramname">IDX</td><td>The attribute index to be associated with this memory region. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ga73c70127f24f34781ad463cbe51d8f6b">&#9670;&#160;</a></span>ARM_MPU_SH_INNER</h2>

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<p>Normal memory inner shareable <br  />
 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga3d0f688198289f72264f73cf72a742e8">&#9670;&#160;</a></span>ARM_MPU_SH_NON</h2>

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<p>Normal memory non-shareable <br  />
 </p>
<p>Shareability </p>

</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#gac4fddbdb9e1350bce6906de33c1fd500">&#9670;&#160;</a></span>ARM_MPU_SH_OUTER</h2>

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<p>Normal memory outer shareable <br  />
 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga8127782b882cbb8419519fc6c98a0b6b">&#9670;&#160;</a></span>ARM_MPU_XN</h2>

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<p>Normal memory, Execution only permitted if read permitted. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga386cab980b576bc5f61388b659eea9a8">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_NON_CACHEABLE</h2>

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<h2 class="memtitle"><span class="permalink"><a href="#gab0847e1992e71f74ed5a31316d22b7bd">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_OUTER_NON_CACHEABLE</h2>

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<p>Normal memory outer-cacheable and inner-cacheable attributes WT = Write Through, WB = Write Back, TR = Transient, RA = Read-Allocate, WA = Write Allocate. </p>

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          <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WT_TR_WA</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ga9d1be17c0bd5895736d4ab352434f61e">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_OUTER_WT_WA</h2>

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          <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WT_WA</td>
        </tr>
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</div><div class="memdoc">

</div>
</div>
<h2 class="groupheader">Function Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#ga9dcb0afddf4ac351f33f3c7a5169c62c">&#9670;&#160;</a></span>ARM_MPU_ClrRegion()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_ClrRegion </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>rnr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Clear and disable the given MPU region. </p><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">rnr</td><td>Region number to be cleared. </td></tr>
  </table>
  </dd>
</dl>

</div>
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<h2 class="memtitle"><span class="permalink"><a href="#gac526bc5bfcf048ce57a44c0c0cdadbe4">&#9670;&#160;</a></span>ARM_MPU_ClrRegion_NS()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_ClrRegion_NS </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>rnr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Clear and disable the given Non-secure MPU region. </p><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">rnr</td><td>Region number to be cleared. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga01fa1151c9ec0ba5de76f908c0999316">&#9670;&#160;</a></span>ARM_MPU_ClrRegionEx()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_ClrRegionEx </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
          <td class="paramname"><em>mpu</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>rnr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Clear and disable the given MPU region of the given MPU. </p><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">mpu</td><td>Pointer to MPU to be used. </td></tr>
    <tr><td class="paramname">rnr</td><td>Region number to be cleared. </td></tr>
  </table>
  </dd>
</dl>

</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ga61814eba4652a0fdfb76bbe222086327">&#9670;&#160;</a></span>ARM_MPU_Disable()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Disable </td>
          <td>(</td>
          <td class="paramtype">void&#160;</td>
          <td class="paramname"></td><td>)</td>
          <td></td>
        </tr>
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<p>Disable the MPU. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga389f9b6049d176bc83f9964d3259b712">&#9670;&#160;</a></span>ARM_MPU_Disable_NS()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Disable_NS </td>
          <td>(</td>
          <td class="paramtype">void&#160;</td>
          <td class="paramname"></td><td>)</td>
          <td></td>
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<p>Disable the Non-secure MPU. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga5a3f40314553baccdeea551f86d9a997">&#9670;&#160;</a></span>ARM_MPU_Enable()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Enable </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>MPU_Control</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Enable the MPU. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">MPU_Control</td><td>Default access permissions for unconfigured regions. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga5866c75d6deb9148a1e9af6337eec50a">&#9670;&#160;</a></span>ARM_MPU_Enable_NS()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> ARM_MPU_Enable_NS </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>MPU_Control</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<p>Enable the Non-secure MPU. </p><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">MPU_Control</td><td>Default access permissions for unconfigured regions. </td></tr>
  </table>
  </dd>
</dl>

</div>
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<h2 class="memtitle"><span class="permalink"><a href="#gaca76614e3091c7324aa9d60e634621bf">&#9670;&#160;</a></span>ARM_MPU_Load()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Load </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>rnr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *&#160;</td>
          <td class="paramname"><em>table</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>cnt</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<p>Load the given number of MPU regions from a table. </p><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">rnr</td><td>First region number to be configured. </td></tr>
    <tr><td class="paramname">table</td><td>Pointer to the MPU configuration table. </td></tr>
    <tr><td class="paramname">cnt</td><td>Amount of regions to be configured.</td></tr>
  </table>
  </dd>
</dl>
<p><b>Example:</b> </p><div class="fragment"><div class="line"><span class="keyword">const</span> <a class="code hl_struct" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> mpuTable[1][4] = {</div>
<div class="line">  {</div>
<div class="line">    <span class="comment">//                     BASE          SH              RO             NP             XN                                LIMIT         ATTR </span></div>
<div class="line">    { .<a class="code hl_variable" href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">RBAR</a> = <a class="code hl_define" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x08000000UL, <a class="code hl_define" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a>, <a class="code hl_define" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a>), .RLAR = <a class="code hl_define" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x080FFFFFUL, MAIR_ATTR(0)) },</div>
<div class="line">    { .RBAR = <a class="code hl_define" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x20000000UL, <a class="code hl_define" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a>, <a class="code hl_define" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a>), .RLAR = <a class="code hl_define" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x20007FFFUL, MAIR_ATTR(0)) },</div>
<div class="line">    { .RBAR = <a class="code hl_define" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x40020000UL, <a class="code hl_define" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a>, <a class="code hl_define" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a>), .RLAR = <a class="code hl_define" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x40021FFFUL, MAIR_ATTR(1)) },</div>
<div class="line">    { .RBAR = <a class="code hl_define" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x40022000UL, <a class="code hl_define" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a>, <a class="code hl_define" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a>), .RLAR = <a class="code hl_define" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x40022FFFUL, MAIR_ATTR(1)) }</div>
<div class="line">  }</div>
<div class="line">};</div>
<div class="line"> </div>
<div class="line"><span class="keywordtype">void</span> UpdateMpu(uint32_t idx)</div>
<div class="line">{</div>
<div class="line">   <a class="code hl_function" href="group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a">ARM_MPU_Load</a>(0, mpuTable[idx], 4);</div>
<div class="line">}</div>
<div class="ttc" id="agroup__mpu8__functions_html_ga64e249c7c678144b52493a4b6f8f6b3c"><div class="ttname"><a href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a></div><div class="ttdeci">#define ARM_MPU_AP_RO</div><div class="ttdoc">Normal memory, read-only.</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:117</div></div>
<div class="ttc" id="agroup__mpu__functions_html_gafa27b26d5847fa8e465584e376b6078a"><div class="ttname"><a href="group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a">ARM_MPU_Load</a></div><div class="ttdeci">__STATIC_INLINE void ARM_MPU_Load(MPU_Region_t const *table, uint32_t cnt)</div></div>
<div class="ttc" id="astructARM__MPU__Region__t_html"><div class="ttname"><a href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a></div><div class="ttdoc">Setup information of a single MPU Region.</div><div class="ttdef"><b>Definition:</b> ref_mpu.txt:84</div></div>
<div class="ttc" id="astructARM__MPU__Region__t_html_afe7a7721aa08988d915670efa432cdd2"><div class="ttname"><a href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">ARM_MPU_Region_t::RBAR</a></div><div class="ttdeci">uint32_t RBAR</div><div class="ttdoc">The region base address register value (RBAR)</div><div class="ttdef"><b>Definition:</b> ref_mpu.txt:85</div></div>
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<h2 class="memtitle"><span class="permalink"><a href="#ga7f8c6e09be98067d613e4df1832c543d">&#9670;&#160;</a></span>ARM_MPU_Load_NS()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Load_NS </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>rnr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *&#160;</td>
          <td class="paramname"><em>table</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>cnt</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<p>Load the given number of MPU regions from a table to the Non-secure MPU. </p><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">rnr</td><td>First region number to be configured. </td></tr>
    <tr><td class="paramname">table</td><td>Pointer to the MPU configuration table. </td></tr>
    <tr><td class="paramname">cnt</td><td>Amount of regions to be configured. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gab6094419f2abd678f1f3b121cd115049">&#9670;&#160;</a></span>ARM_MPU_LoadEx()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_LoadEx </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
          <td class="paramname"><em>mpu</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>rnr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *&#160;</td>
          <td class="paramname"><em>table</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>cnt</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<p>Load the given number of MPU regions from a table to the given MPU. </p><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">mpu</td><td>Pointer to the MPU registers to be used. </td></tr>
    <tr><td class="paramname">rnr</td><td>First region number to be configured. </td></tr>
    <tr><td class="paramname">table</td><td>Pointer to the MPU configuration table. </td></tr>
    <tr><td class="paramname">cnt</td><td>Amount of regions to be configured. </td></tr>
  </table>
  </dd>
</dl>

</div>
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<h2 class="memtitle"><span class="permalink"><a href="#gac1a949403bf84eecaf407003fb553ae7">&#9670;&#160;</a></span>ARM_MPU_OrderedMemcpy()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_OrderedMemcpy </td>
          <td>(</td>
          <td class="paramtype">volatile uint32_t *&#160;</td>
          <td class="paramname"><em>dst</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const uint32_t *<a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a>&#160;</td>
          <td class="paramname"><em>src</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>len</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Memcpy with strictly ordered memory access, e.g. used by code in <a class="el" href="group__mpu8__functions.html#gab6094419f2abd678f1f3b121cd115049">ARM_MPU_LoadEx</a>. </p><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">dst</td><td>Destination data is copied to. </td></tr>
    <tr><td class="paramname">src</td><td>Source data is copied from. </td></tr>
    <tr><td class="paramname">len</td><td>Amount of data words to be copied. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gab5b3c0a53d19c09a5550f1d9071ae65c">&#9670;&#160;</a></span>ARM_MPU_SetMemAttr()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetMemAttr </td>
          <td>(</td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>idx</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>attr</em>&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Set the memory attribute encoding. </p><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">idx</td><td>The attribute index to be set [0-7] </td></tr>
    <tr><td class="paramname">attr</td><td>The attribute value to be set. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga5100a150a755902af2455a455a329ef9">&#9670;&#160;</a></span>ARM_MPU_SetMemAttr_NS()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetMemAttr_NS </td>
          <td>(</td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>idx</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>attr</em>&#160;</td>
        </tr>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Set the memory attribute encoding to the Non-secure MPU. </p><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">idx</td><td>The attribute index to be set [0-7] </td></tr>
    <tr><td class="paramname">attr</td><td>The attribute value to be set. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga1799413f08a157d636a1491371c15ce2">&#9670;&#160;</a></span>ARM_MPU_SetMemAttrEx()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetMemAttrEx </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
          <td class="paramname"><em>mpu</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>idx</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>attr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Set the memory attribute encoding to the given MPU. </p><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">mpu</td><td>Pointer to the MPU to be configured. </td></tr>
    <tr><td class="paramname">idx</td><td>The attribute index to be set [0-7] </td></tr>
    <tr><td class="paramname">attr</td><td>The attribute value to be set. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga6d7f220015c070c0e469948c1775ee3d">&#9670;&#160;</a></span>ARM_MPU_SetRegion()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetRegion </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>rnr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>rbar</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>rlar</em>&#160;</td>
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          <td></td>
          <td>)</td>
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<p>Configure the given MPU region. </p><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">rnr</td><td>Region number to be configured. </td></tr>
    <tr><td class="paramname">rbar</td><td>Value for RBAR register. </td></tr>
    <tr><td class="paramname">rlar</td><td>Value for RLAR register. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga7566931ca9bb9f22d213a67ec5f8c745">&#9670;&#160;</a></span>ARM_MPU_SetRegion_NS()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetRegion_NS </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>rnr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>rbar</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>rlar</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Configure the given Non-secure MPU region. </p><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">rnr</td><td>Region number to be configured. </td></tr>
    <tr><td class="paramname">rbar</td><td>Value for RBAR register. </td></tr>
    <tr><td class="paramname">rlar</td><td>Value for RLAR register. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga3d50ba8546252bea959e45c8fdf16993">&#9670;&#160;</a></span>ARM_MPU_SetRegionEx()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetRegionEx </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
          <td class="paramname"><em>mpu</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>rnr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>rbar</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>rlar</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Configure the given MPU region of the given MPU. </p><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">mpu</td><td>Pointer to MPU to be used. </td></tr>
    <tr><td class="paramname">rnr</td><td>Region number to be configured. </td></tr>
    <tr><td class="paramname">rbar</td><td>Value for RBAR register. </td></tr>
    <tr><td class="paramname">rlar</td><td>Value for RLAR register. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gabd11943b38cdf185dcb8e60e459d5854">&#9670;&#160;</a></span>ARM_MPU_TYPE()</h2>

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          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t ARM_MPU_TYPE </td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Read MPU Type Register. </p>
<dl class="section return"><dt>Returns</dt><dd>Number of MPU regions </dd></dl>

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